Recently, as integrated circuits and coding techniques, which can process digital data at a high speed, are becoming available. Therefore, analog-system techniques are now replaced by such digital techniques. Particularly, growth television broadcasting service, satellite broadcasting service and the like are being converted to digital broadcasting.
The digital satellite broadcasting adopts a radio communication system in which a carrier signal is transmitted via an artificial satellite and is received directly by a receiver installed in a house or the like. However, since this digital satellite broadcasting utilizes the atmosphere as a transmission space, it is easily influenced by weather and the other factors. When the weather is bad the reception becomes worse. As a result, in a transmitter and a receiver which are terminal sections of the digital satellite broadcasting system, the transmission/receiving process with high stability and high reliability is required in comparison with the conventional cable and ground wave television service.
In radio communication of a digital-modulated signal like the digital satellite broadcasting, digital data to be digital-modulated are composed of bit strings (data stream) which undergo a so-called coding process in which redundancy is added to actual data so that the stability and reliability of the transmission/receiving process is heightened.
As the redundancy of the data stream is higher, error correction ability of the data stream is improved further in the decoding process in the receiver. In other words, even if the data stream with high redundancy include a lot of error bits upon receiving, the error bits can be corrected and the data stream can be reproduced correctly upon transmission. Meanwhile, such data stream with high redundancy has a disadvantage that a number of structure bits increases and transmission efficiency is lowered.
When image or sound information is received as data stream including a little error, for example, the information as a whole can be accepted. Therefore, the redundant may be comparatively lowered and the transmission efficiency heightened so that a lot of information can be transmitted. On the other hand, for a data stream which represents computer programs where even one bit error is not allowed, generally the redundancy is set to comparatively higher value because upon receiving the information is required to be securely restored.
FIG. 1 is a block diagram showing a schematic structure of a conventional transmitter and particularly shows a portion of the transmitter used in digital satellite broadcasting. This transmitter is composed of a coder 100 and a modulator 150. The coder 100 multiplexes and codes data from a plurality of information sources 1, 2, . . . , n. The modulator 150 modulates the coded signals according to a predetermined modulation system. The information sources here are digital data strings (transport stream) which are compressed by MPEG2 (Motion Picture Expert Group 2) as one of the motion picture compressing systems.
Further, the coder 100 is composed of a multiplexer 110, a convolution coder 120, a punctured module 130 and a multiplex control signal generator 140. Although not shown in the figure, the multiplexer 110 is composed of, for example, a Reed-Solomon coding circuit, a frame structure circuit, an energy dispersion circuit and an interleaver and multiplexes and codes the input information sources. Operation of the transmitter is explained below.
The multiplex control signal generator 140 generates a multiplex control signal which represents multiplexed information of the information sources. The multiplexed information is the information which represents positions (timing) of information source data multiplexed on one carrier and transmission systems (redundancy, modulation systems, etc).
The information sources are input into the Reed-Solomon coding circuit of the multiplexer 110. The Reed-Solomon coding circuit adds a Reed-Solomon code which, can correct an error of a byte unit in the receiver based on the multiplex information represented by the multiplex control signal output from the multiplex control signal generator 140, to the bit strings of the information sources so as to output the coded strings of the respective information sources.
The code strings output from the Reed-Solomon coding circuit are input into the frame structure circuit. The frame structure circuit multiplexes the code strings based on the multiplex information represented by the multiplex control signal output from the multiplex control signal generator 140 so as to structure a frame to be a unit of the multiplexed data.
A signal output in the frame unit from the frame structure circuit is input into the energy dispersion circuit. The energy dispersion circuit adds (scramble) a pseudo random signal (energy dispersion signal) to the digital data. As a result, the digital data composing the input frames, namely, bit strings are not transmitted as enumeration of bit “0” or bit “1” for long period.
The aim is to prevent misconception of reception such as error detection or non-detection of a digital signal on the receiving side due to reception of the long-period continuous same bits. The pseudo random signal should be removed on the receiving side. For this reason, also in the energy dispersion circuit, a position of the digital data, where information representing a generating condition of the pseudo random signal such as a random initial value and the like is shown, is determined by referring to the multiplex information.
The signal scrambled in the energy dispersion circuit is input into the interleaver. The interleaver rearranges the digital data represented by the input signal in byte unit so as to improve resistance to a burst error (long-period continuous error) appearing intensively in time.
As a result, even if burst errors occur in the rearranged digital signals, the errors which occur intensively can be dispersed because the process for restoring the rearrangement of the digital signals (the process by the interleaver) is executed on the receiving side. As a result, improvement of the error correction and a correct recognition rate of the transmitted information can be heightened. The information about the rearrangement can be obtained also from the multiplex information.
The signals arranged by the interleaver are the outputs of the multiplexer 110 and are input into the convolution coder 120. The convolution coder 120 executes the convolution coding process with respect to the input signals. As a result, random errors such as errors of irregular bit units such as a thermal noise which are generated in a transmission line or the receiver can be corrected.
FIG. 2 is a block diagram showing a schematic structure of the convolution coder 120. The convolution coder 120 is composed of a shift register comprising D latches 121 and 122, two EXOR circuits 124 and 125, and a parallel-serial converter 128. The convolution coder 120 executes the coding in such a manner that one-bit input data are output as 2-bit data. When the coding rate is defined as (Original information content)/(coded information content), the coding rate in the convolution coder 120 is 1/2.
In the convolution coder 120 shown in FIG. 2, two-bit serial data are held by the D latches 121 and 122 in the order of input. Three-bit serial data are converted into parallel data by the two-bit data and one-bit data further input. Newly input data and the data held in the D latches 121 and 122 are input into the EXOR circuit 124 so as to undergo exclusive OR. Moreover, the newly input data and the data held in the D latch 122 are input into the EXOR circuit 125 so as to undergo exclusive OR.
The calculated results of the two exclusive OR are again converted into serial data in the parallel-serial converter 128. As a result, three-bit input serial data are output as six-bit serial data, for example, and this output result becomes a convolution code.
In order to improve the transmission efficiency, four-bit data, which are obtained by thinning out two bits from six-bit data output from the convolution coder 120, are used as output data. In this method, the coding rate is 3/4, and in comparison with the coding rate 1/2 in the case of the convolution coder 120, redundancy can be made lower and the transmission efficiency can be heightened.
Furthermore, this method simultaneously reduces the error correction ability. As a result, the redundancy can be controlled by changing a degree of the thinning-out of data. This data thinning-out process is called as puncturing. The punctured module 130 shown in FIG. 1 executes such puncturing.
FIG. 3 is an explanatory diagram showing an example of the coding rate obtained by puncturing. FIG. 3 shows puncturing of the coding rates 2/3, 3/4, 5/6 and 7/8 which is generated by thinning out a convolution code of the coding rate 1/2. Explanation is provided below for the puncturing of the coding rate 3/4.
It is assumed that data “x0, y0, x1, y1, x2, y2” are obtained from data constituted by “d0, d1, d2” by the convolution coder 120. In such a case, the punctured module 130 deletes a bit in a position corresponding to “0” with reference to a previously prepared bit deletion map “1, 1, 0, 1, 1, 0”. Undeleted bit after the deleted one is shifted to the position of the deleted bit. In other wards, this bit deletion map shows that two bits are thinned out from six bits. As a result, only four-bit data of “x0, y0, y1, x2” are output.
Thus, the punctured module 130 enables changes of various kinds in the coding rates as shown in FIG. 3. When a various kinds of bit deletion maps are prepared, the transmission efficiency can be selected according to a signal transmission line or a signal characteristic.
The code strings output from the punctured module 130 in such a manner become a data stream which is obtained by coding and multiplexing data of a plurality of information sources with the coding rates determined in the respective information source. The data stream is output from the coder 100. The data stream is input into the modulator 150 shown in FIG. 1 and is digital-modulated according to a modulation system which is suitable to the carrier so as to be output as a transmission signal.
As the digital modulation executed in the modulator 150, modulations like amplitude modulation (ASK), frequency modulation (FSK), phase modulation (PSK) may be considered. An explanation is provided below for the digital phase modulation.
The digital phase modulation is a system where the bit structures composed of “0” or “1” of the digital data are made to have correspondence to phases, and the phases are changed for the carrier so that information is transmitted. The digital phase modulation system further includes BPSK, QPSK (or 4PSK), 8PSK and the like according to a number of phases to be used.
As for the transmission signal which is digital-phase modulated, one phase state (transmission symbol) of the carrier is checked in the receiver so that one-bit information can be transmitted in BPSK and two-bit information in QPSK and three-bit information in 8PSK. This shows that the transmission efficiency varies with the respective phase modulation systems. However, as the transmission efficiency becomes higher, adjacent transmission symbols are closer to each other so that clear distinction between the phases becomes difficult. As a result, error can be easily generated in the information. For this reason, the phase modulation using these three systems is selected according to a characteristic of information to be transmitted.
In other words, as for the data of the information sources multiplexed as the data stream, in addition to the selection of the coding rates by means of the coder 100, the modulation system by means of the modulator 150 can be selected.
FIG. 4 is an explanatory diagram showing a structure of the data stream output from the coder 100. The data stream shown in FIG. 4 is generated by the frame structure circuit. A data stream 1, a data stream 2, and a data stream 3 which represent three information source data are multiplexed and arranged in a frame identified by a synchronous code. For example, the data stream 1, the data stream 2, and the data stream 3 can be allocated in this order to a QPSK modulation stream of the coding rate 3/4, a QPSK modulation stream of the coding rate 1/2 and a BPSK modulation stream of the coding rate 1/2.
In addition, some frames can be processed as one collective information (hereinafter, referred to as “super frame”). In this case, in the super frame composed of eight frames, for example, the synchronous code is arranged at the head of each frame, and a parity signal corresponding to the Reed-Solomon code is arranged in the last two frames so that the error correction ability is heightened.
An explanation is provided below for a conventional receiver which receives a transmission signal transmitted from the transmitter and demodulates and decodes the signal. FIG. 5 is a block diagram showing a schematic structure of such a conventional receiver. FIG. 5 shows one example of the receiver of the digital satellite broadcasting which is suitable to the transmitter in FIG. 1. This receiver is composed of a demodulator 190 further having a digital phase modulation circuit and a decoder 200.
The decoder 200 is composed of a depuncture module 210, a Viterbi decoder 220, a synchronizer 230, a data stream decoder 240, a multiplex control signal generator 250, and a multiplex information storage section 260. The data stream decoder 240 is composed of, for example, a deinterleaver, an energy dispersion signal removal circuit and a Reed-Solomon code error correcting circuit correspondingly to the similar structure in the multiplexer 110 shown in FIG. 1. The data stream decoder 240 decodes the multiplexed data stream. Operation of this receiver is explained below.
Similarly to the multiplex control signal generator 140 shown in FIG. 1, a multiplex control signal is generated in the multiplex control signal generator 250 of the decoder 200. Multiplex information represented by the multiplex control signal is previously stored in the multiplex information storage section 260. The multiplex control signal generator 250 generates a multiplex control signal based on the multiplex information.
The demodulator 190 demodulates the received signal in accordance with acquisition timing of the information source data represented by the multiplex control signal and the modulation system. Precisely, the demodulator 190 extracts a code string in the state before the received signal is modulated in the modulator 150 of the transmitter, and digital phase demodulation is executed in this example.
The signal demodulated by the demodulator 190 is input into the depuncture module 210 of the decoder 200. The depuncture module 210 inserts the bit which is deleted in the punctured module 130 into the input signal based on the coding rate represented by the multiplex control signal (depuncturing).
The code string which is depunctured by the depuncture module 210 is input into the Viterbi decoder 220 so that the convolutional code coded in the convolution coder 120 of the transmitter is decoded. That is, the Viterbi decoder 220 calculates a Hamming distance between the code represented by the input code string and a code on a trellis chart as path metric and leaves path metric of short Hamming distance as survival path. Further, the Viterbi decoder 220 decodes a code string corresponding to a path metric of the shortest Hamming distance as a maximum code.
The code string decoded by the Viterbi decoder 220 is input into the synchronizer 230. The synchronizer 230 detects a synchronous code in the frame shown in FIG. 4 from the data stream and generates a control signal for acquiring the decoding timing of the multiplexed code strings.
FIG. 6 is a block diagram showing a schematic structure of the synchronizer 230. As shown in FIG. 6, the received code string is input into a sync word detection circuit 231 and a buffer 235. The sync word detection circuit 231 detects the synchronous code from the input code string and generates a detection signal. The synchronous acquisition control circuit 232 outputs a signal representing synchronous timing according to the received the detection signal and a predetermined synchronous clock.
A control signal generation circuit 233 inputs the signal output from the synchronous acquisition control circuit 232 so as to output a control signal representing that current time is positioned at the head of the frame. Meanwhile, the code string input into the buffer 235 is delayed until output of the control signal is completed so as to be output as data stream at predetermined timing. The control signal output from the synchronizer 230 is input into the multiplex control signal generator 250 shown in FIG. 5 so as to be utilized for obtaining output timing of the multiplex control signal.
The data stream output from the synchronizer 230 is input into the data stream decoder 240. The data stream then undergoes the decoding processes corresponding to the coding processes in the interleaver, the energy dispersion circuit and the Reed-Solomon coding circuit composing the multiplexer 110 shown in FIG. 1.
The decoded data bit string output from the data stream decoder 240 becomes an output of the decoder 200 and is input into a not shown MPEG reproduction apparatus or the like, which is connected in the later stage. This MPEG reproduction apparatus extracts corresponding data from the data bit string by selecting an information source, and displays the extracted data as a motion picture.
However, as mentioned above, the transmission-reception system composed of the convolution coder 120 and the Viterbi decoder 220, coding and decoding are executed by the calculation methods based on superposing of past bit strings continuously transmitted. For this reason, a data stream having coding rate of high error correction ability is influenced by the case that error cannot be corrected in a data stream having coding rate of low error correction ability. As a result, the whole error correction ability of the multiplexed data stream is lowered.
For example, consider a case in which two or more kinds of coding rates are used between the data streams composing the multiplexed data stream, and comparatively big noise is mixed on the transmission line. In this case, although error can be sufficiently corrected in the data stream having coding rate of high error correction ability in the multiplexed data streams, error is still included in a decoded result of the data stream having coding rate of low error correction ability. In this state, the Viterbi decoder decodes the data stream having coding rate of high error correction ability which is next input continuously according to calculation of path metric using the data stream including the error. For this reason, the data stream having coding rate of high error correction ability cannot be decoded correctly.
In order to solve such a problem, Japanese Patent Application Laid-Open No. 9-247003 discloses “information receiver”. This information receiver inserts a known “end bit” into a plurality of multiplexed data streams by means of the convolution coder just before the coding rate changes. The Viterbi decoder initializes path metric at timing that the “end bit” is detected.
As a result, in the state that the path metric is initialized per data stream, namely in the state that a storage device of a Hamming distance calculated in the Viterbi decoder is initialized, Viterbi decoding can be started. This prevents the data streams having different coding rates from being influenced by the decoding.
However, the “information receiver” cannot solve the above problem when the “end bit” cannot be inserted into the data streams from the viewpoint of the standard of data transmission in digital satellite broadcasting or the like. If the “end bit” is not inserted and not detected and the path metric is initialized at a change point of the coding rate, namely, a point that transmission of next data stream is started, there arises a new problem that a convolutional code fails and the error correction ability is lowered.
For example, in a data stream which is obtained by multiplexing a code of low error correction ability and a code of high error correction ability, an error of a code having low error correction ability which can be corrected sufficiently occurs on a transmission line. In this case, when the path metric is initialized at the change point of the data stream, a vicinity of the head of the data stream cannot be decoded. As a result, more errors occur than the case that the initialization is not executed.